Chip Testing Engineer简历模板

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Peter Xiong

phone13800000000
emailzhangwei@example.com
cityShanghai
birth30
genderMale
jobChip Testing Engineer
job_statusEmployed
intended_cityShanghai
max_salary20k - 30k
Education Experience
Shanghai University
211 Project
Electronic Information Engineering
Bachelor's Degree
2015 . 092019 . 06
  • Systematically studied professional courses such as Digital Circuits, Analog Circuits, Signals and Systems, laying a solid theoretical foundation for chip testing work; - Participated in the electronic design competition organized by the school, familiar with the circuit design and debugging process, and exercised practical operation ability.
Work Experience
A Semiconductor Technology Co., Ltd. in Shanghai
Semiconductor TechnologyInnovative Enterprise
Testing Department
Chip Testing Engineer
Chip TestingAutomated TestingProblem Analysis
2019 . 072022 . 12
Shanghai
  • Responsible for the formulation and implementation of chip function testing plans to ensure the accuracy and efficiency of the testing process. Through optimizing test cases, the testing coverage was increased from 85% to 92%, effectively reducing the defective rate of chip mass production; - Closely cooperated with the R & D team, analyzed problems in the testing process, put forward improvement suggestions and tracked verification. Successfully solved the timing consistency problem of a certain series of chips, improving the chip performance by 15%; - Built an automated testing platform, introduced Python scripts to achieve the automation of the testing process, saving 30% of the testing time and improving testing efficiency.
A Integrated Circuit Design Company in Shanghai
Integrated Circuit DesignHigh - tech Enterprise
Testing R & D Department
Senior Chip Testing Engineer
System - level TestingResource ManagementTeam Training
2023 . 01Present
Shanghai
  • Led the system - level testing of complex chips and formulated comprehensive testing strategies. Led the team to complete the testing work of a high - end processor chip, discovered and solved more than 20 potential problems, and ensured the high - quality delivery of the chip; - Optimized testing resource management, reasonably allocated testing equipment and personnel according to project priorities, increasing resource utilization by 25% while ensuring the on - time delivery of multiple projects; - Conducted technical training and knowledge sharing, trained 3 junior testing engineers, and improved the overall technical level of the team.
Project Experience
A High - Performance Chip Testing Project
Testing Engineer
A Semiconductor Technology Co., Ltd. in Shanghai
2020 . 032021 . 06
  • Participated in [A High - Performance Chip Testing Project], responsible for the functional verification and performance testing of chips. Formulated detailed testing plans and designed more than 500 test cases, covering all functional modules of the chip; - Used testing tools to conduct stress testing on chips, simulated various complex working conditions, discovered and assisted the R & D team in solving the stability problem of chips in high - temperature environments; - Wrote testing reports, recorded the testing process and results in detail, and provided data support for the optimization of chips. Through this project, the comprehensive performance of the chip was improved by 10%, reaching the industry - leading level.
A Low - Power Chip Testing Optimization Project
Project Leader
A Integrated Circuit Design Company in Shanghai
2023 . 032023 . 12
  • Responsible for [A Low - Power Chip Testing Optimization Project], analyzed the bottlenecks of the existing testing process and proposed optimization plans. Introduced new testing algorithms, shortened the testing time by 40% while ensuring that the testing accuracy was not affected; - Built a testing data analysis platform, used big data analysis technology to mine potential information in testing data, and provided a strong basis for chip design optimization. Through data analysis, discovered and solved the abnormal power consumption problem of the chip, reducing the chip power consumption by 8%; - Cooperated with cross - departmental teams, coordinated various resources to ensure the project's progress as planned. Finally, this project was completed 2 weeks ahead of schedule, and the chip smoothly entered the mass production stage.
Personal Summary

With [X] years of chip testing experience, proficient in chip function, performance and system - level testing. Have strong problem analysis and solving ability, and be good at optimizing the testing process and building an automated testing platform. Familiar with a variety of testing tools and programming languages, and can efficiently promote project progress. Excellent team cooperation ability, with both technical depth and project management experience, committed to escorting the quality of chip products.

Honors and Awards
Company's Annual Outstanding Employee
Other Information
Use of Testing Tools:

Proficient in the operation and programming of ATE testing equipment (such as Teradyne, Advantest), and can write efficient test programs according to chip characteristics. Familiar with JTAG debugging interface, and can perform chip - level debugging and fault location.

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